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POWERVR Graphics, Video and Display IP Cores

Wednesday, April 14, 2010

POWERVR™ visual IP technologies have been developed over more than 15 years to meet the most demanding requirements of high volume mobile and consumer applications. With their roots in arcade and digital TV, POWERVR visual technologies lead the world in delivering exceptional levels of performance while delivering low power, small silicon area and high levels of system latency tolerance when integrating with unified memory and other shared resources.
POWERVR Graphics

POWERVR graphics technology is based on a concept called Tile Based Deferred Rendering (TBDR). In contrast to Immediate Mode Rendering (IMR) used by most graphics engines in the PC and games console worlds, TBDR focuses on minimising the processing required to render an image as early in the processing of a scene as possible, so that only the pixels that actually will be seen by the end user consume processing resources. This approach minimizes memory and power while improving processing throughput but it is more complex. Imagination Technologies has refined this challenging technology to the point where it dominates the mobile markets for 3D graphics rendering, backed up by an extensive patent portfolio.

The latest generation of this advanced architecture is the POWERVR SGX Series5 and Series5XT families of graphics IP cores. Series5 architecture takes the TBDR capability to a new level. With a level of scalability from 1 to 8 pipelines and beyond, based on the unique Universal Scalable Shader Engine (USSE), POWERVR SGX brings fully compliant OpenGL ES 2.0 shader-based graphics capability to mobile and consumer platforms. Series5XT architecture further builds on the underlying strengths of Series5, delivering significant performance advantages through increased floating point and instruction throughput as well as natively supported YUV and color space conversion. This architecture also significantly further extends the scalability of the architecture by enabling multi-processor implementations, with up to 16 core instantiations possible that deliver better than 95% linear performance scaling of both geometry and pixel processing resources. The total Series5 and Series5XT portfolio therefore enables the industry’s broadest range of performance/area options, from the smallest single pipe SGX520 core up to the 64-pipe SGX543MP16. All popular APIs and OS are supported by all SGX cores, including OpenGL ES 2.0/1.1, OpenVG 1.1, OpenGL 2.0/3.0 and DirectX 9/10.1 on Symbian, Linux, Android, WinCE/Windows Mobile and Windows 7/Vista/XP.

The SGX family of cores builds heavily on the unprecedented success of the previous generation, POWERVR MBX. Widely respected as the dominant graphics acceleration technology for first generation true smartphones in terms of units shipped and in production, MBX and MBXlite delivers fully compliant OpenGL ES 1.1 capabilities as well as OpenVG 1.0 vector graphics and extensive 2D capabilities. Backwards compatibility from SGX to MBX also ensures that any applications developed for MBX not only execute on SGX, but do so with better performance and efficiency than ever before.

Completing the portfolio of graphics IP cores is POWERVR VGX. This innovative new IP core architecture delivers native OpenVG 1.1 and OpenWF 1.0 compliant acceleration with extremely small silicon area footprint and low host overhead, whilst maintaining all the benefits of TBDR leading to market-leading vector graphics performance and quality with minimal CPU loading.

POWERVR MBX and SGX graphics IP cores have been selected by industry leaders such as TI, Intel, Freescale, Renesas, Samsung and NXP to power their application processors' graphics functions.
POWERVR Video

POWERVR video technology builds on the underlying architectural philosophies of POWERVR graphics: use the lowest power and memory bandwidth, while delivering the highest performance. This engineering philosophy has resulted in the POWERVR VXD decoder and VXE encoder families of video codecs supporting all the latest standards including H.264 High Profile, VC-1 and AVS. The third-generation VXD IP cores use a series of multimode hardware engines controlled by our own META MTX 32-bit embedded SoC Processor core to deliver a multi-standard video decoder capable of decoding dual HD streams in less than 150mW in a 65nm technology. This exceptional capability means that HD content can now be decoded and viewed on a mobile phone, or played from the phone directly on to a HD panel – and you'll be able to watch the entire film, not just the first 30 minutes! All VXD cores are also multi-stream as well as multi-standard, which means that a single core can decode multiple streams at the same time, depending on operating clock frequency. The header processor identifies the appropriate standard and reconfigures the hardware engines on a frame-by-frame basis, such that multiple streams can also be multiple standards. So, the ability to interactively preview and browse content from various sources is now a reality.

VXD Block DiagramOur third generation VXE multi-standard video encoder family complements the VXD decoders, creating a total solution for cameras and web 2.0 platforms. VXE cores encode all key standards in HD or SD resolution – like VXD they are multi-standard. When combined with VXD cores, mobile platforms can now manage HD content as easily and with comparable power consumption to audio players today.

All VXD and VXE cores support all the major standards (range varies according to individual core) including H.264 (Base to High profile), MPEG4, MPEG2, VC-1/WMV, AVS, Sorenson and JPEG. Some VXD cores now also offer hardware rotation and scaling, delivering significant reductions in bandwidth and power consumption. When combined with SGX cores, scaling can also be done by the SGX core, making the combination of VXD, VXE and SGX extremely powerful for a wide range of multimedia applications.
POWERVR Display

Imagination Technologies' long association with the TV industry has enabled us to develop an unrivalled range of display enhancement technologies for HDTV. From skin tone and blue/black stretch engines to state-of-the-art interlace-to-progressive scan conversion technologies; from frame rate conversion to TV output capabilities – POWERVR display technologies have it covered. Indeed, many Tier 1 OEMs are either already adopting or considering moving away from their in-house designs to Imagination-based solutions.

DTV ChipOur POWERVR I2P IP cores achieve exceptional de-interlacer performance up to full HD resolutions, while using innovative new algorithms to deliver the highest performance in far smaller silicon area than traditional solutions. Imagination’s I2P de-interlacers have been adopted by industry leader such as NEC, and are shipping today world-wide in several Tier 1 OEM HDTVs.

Our latest POWERVR FRC IP cores are also generating significant interest, enabling highly intelligent up-sampling of up to HD resolution content from 24fps to 100/120 up to 200/240fps, offering excellent dejudder and motion deblur characteristics.

And, there are more IP cores for our custom SoC IP customers, including our IEP (Image Enhancement Processor), PDP (Pixel Display Processor), CADI (Composite Analogue to Digital Interface) and TVE (TV Encoder output) IP blocks – available through out IMGworks group.



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